Senior Post-Silicon Validation Engineer

Seattle, WA·Posted 17d ago

python

<div class="content-intro">K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space. The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits. With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply.</div>About the Role  We are looking for a hands-on Senior Post-Silicon Validation Engineer to own silicon bring-up, characterization, and system-level validation of complex mixed-signal SoCs, while enabling a smooth transition from validated silicon into product integration.  You will define the validation strategy, build our test and validation capability from the ground up, and lead execution from first silicon through product readiness. Responsibilities  <ul> <li>Own post-silicon validation strategy, test planning, execution, coverage, and sign-off. </li> <li>Lead first silicon bring-up across power, clocks, debug interfaces, processor/memory subsystems, peripherals, and high-speed interfaces. </li> <li>Define and execute the validation strategy and readiness criteria needed to enable product integration, ensuring silicon, firmware, test infrastructure, and system interfaces are ready for integration. </li> <li>Own system-level test planning and execution, including functional, performance, stress, and corner-case testing. </li> <li>Help build the test and validation lab from the ground up, including equipment, infrastructure, test setups, and automated characterization and regression environments. </li> <li>Partner with RF/analog and mixed-signal designers on characterization of RF chains, PLLs, ADCs/DACs, clocking, and power. </li> <li>Work closely with systems/DSP teams to validate DSP and calibration algorithms on silicon and correlate measured performance with models and simulations. </li> <li>Partner with FPGA, firmware, RTL/DV, hardware, and systems teams to accelerate silicon bring-up, enable product integration, and drive end-to-end validation. </li> <li>Drive cross-functional debug across silicon, firmware, RTL, package, board, and system boundaries. </li> <li>Build reusable automation for instrumentation control, data collection, analysis, regression, and reporting. </li> <li>Drive silicon issues from discovery through root cause, workaround, and resolution. </li> </ul> Qualifications  <ul> <li>BS/MS in Electrical Engineering, Computer Engineering, or equivalent experience. </li> <li>5+ years of post-silicon validation, SoC bring-up, silicon characterization, or related experience. </li> <li>Hands-on experience bringing up complex mixed-signal SoCs/ASICs and transitioning silicon into product/system integration. </li> <li>Hands-on experience with lab test and measurement equipment, including oscilloscopes, spectrum/signal analyzers, vector signal generators, network analyzers, logic analyzers, power supplies, and related RF/mixed-signal instrumentation. </li> <li>Strong understanding of SoC architecture and working knowledge of RF/analog and mixed-signal circuits. </li> <li>Strong hardware/software debug skills spanning silicon, RTL, firmware, board, and systems. </li> <li>Experience building silicon validation labs, test infrastructure, and automated measurement environments. </li> <li>Experience validating DSP, calibration, or signal-processing functionality in silicon. </li> <li>Strong Python/scripting skills for lab automation, instrumentation, and data analysis. </li> <li>Experience with embedded C/C++, JTAG, SPI, UART, and register-level debug. </li> <li>Ability to lead cross-functional bring-up while remaining deeply hands-on in the lab. </li> </ul> Preferred Qualifications  <ul> <li>RF SoC and RF/analog characterization experience. </li> <li>ADC/DAC, PLL, RF transceiver, or high-speed SerDes/JESD validation experience. </li> <li>FPGA prototyping and RISC-V/ARM SoC experience.</li> </ul> Compensation and Benefits: <ul> <li>Base salary range for this role is $170,000 – $250,000 + equity in the company</li> <li>Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level</li> <li>Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks</li> </ul><div class="content-conclusion">If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged! If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know. Export Compliance As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.” The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by <a class="c-link" href="https://www.law.cornell.edu/cfr/text/22/120.15" target="_blank">22 C.F.R. § 120.15</a> or otherwise eligible for a federally issued export control license. Equal Opportunity K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.</div>

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