RFIC Layout Designer (Starshield Silicon)

Hawthorne, CA·Posted today
aipythonnodefoundry
<div class="content-intro"><p>SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of&nbsp;enabling human life on Mars.</p></div><p><strong><span data-contrast="auto">RFIC&nbsp;LAYOUT DESIGNER&nbsp;(STARSHIELD SILICON)</span></strong><span data-ccp-props="{}">&nbsp;</span></p> <p><span data-contrast="auto">Starshield leverages SpaceX’s Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and commercial use, Starshield is designed for government use, with an initial focus on earth observation, communications, and hosted payloads. As a RFIC&nbsp;Layout&nbsp;Engineer on the Starshield team, you will be working on advanced development programs in support of U.S. National Security.&nbsp;</span><span data-ccp-props="{}">&nbsp;</span></p> <p><span data-contrast="auto">We are seeking motivated, proactive, and intellectually curious engineers who will work alongside world-class cross-disciplinary teams (systems architecture, ASIC design, firmware, pre-silicon verification, post-silicon validation, product engineering, manufacturing/production, and more). In this role, you will be on a team working on multiple silicon projects that are driving more integration, lower power, mixed signal architectures and advanced silicon technology for deployment in space and ground infrastructures. You will be an integral part of the IC design team and lead the discipline of layout at the technical&nbsp;level and&nbsp;will work with RFIC/mixed signal designers on full chip layout of custom analog and RFIC designs. </span><span data-ccp-props="{}">&nbsp;</span></p> <p><strong><span data-contrast="auto">RESPONSIBILITIES:</span></strong><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li><span data-contrast="auto">Work with the integrated circuit designers and chip leads to&nbsp;determine&nbsp;the chip floor plan; this includes strategies for power and ground distribution as well as working with packaging&nbsp;engineers&nbsp;to determine pad locations</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Accurately estimate the schedule for the layout work and identify areas of complexity that need early investigation</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Perform layout of custom RF and analog circuit blocks with attention to matching and minimizing parasitic capacitance in the layout</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Perform design rule checking, electrical rule checking and layout versus schematic checks and resolve errors</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Perform top-level layout integration with electrostatic discharge structures and pad assembly and perform final tape out (including density fill, running design for manufacturability checks and sharing GDS with the foundry)</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Work with EDA suppliers to trial new tools and features</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Generate guides and demos for others in the team to showcase improvements in layout technique</span><span data-ccp-props="{}">&nbsp;</span></li> </ul> <p><strong><span data-contrast="auto">BASIC QUALIFICATIONS:</span></strong><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="1" data-aria-level="1"><span data-contrast="auto">Bachelor’s degree in electrical or computer engineering or</span><span data-contrast="auto">&nbsp;3+ years of professional experience with integrated circuit layout design in lieu of a degree</span><span data-ccp-props="{}">&nbsp;</span></li> <li data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="1" data-aria-level="1"><span data-contrast="auto">1+ years of professional experience as an IC layout designer</span></li> </ul> <p><strong><span data-contrast="auto">PREFERRED SKILLS AND EXPERIENCE:</span></strong><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li><span data-contrast="auto">Strong analog layout skills</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience in advanced node IC layouts such as 16nm, 7nm, 5nm or below</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience in layout of circuits with frequencies up to 50GHz</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience in layout of sensitive RF blocks such as low noise amplifiers,&nbsp;voltage-controlled&nbsp;oscillators and mixers</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience with&nbsp;skill programming</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience with shell scripting, Perl, Python or similar language</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience managing revision control systems</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience with circuit design</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Understanding of layout considerations for device matching, coupling and noise isolation</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Working knowledge of Linux</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Excellent communication skills (both oral and written) are required</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Able to work independently on challenging problems</span><span data-ccp-props="{}">&nbsp;</span></li> </ul> <p><strong><span data-contrast="auto">ADDITIONAL REQUIREMENTS:</span></strong><strong><span data-contrast="auto"> </span></strong><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li><span data-contrast="auto">Ability to work long hours and weekends as necessary to support critical milestones</span><span data-contrast="auto"> </span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">An active clearance may provide the opportunity for you to work on sensitive SpaceX missions; if so, you will be subject to pre-employment drug and random drug and alcohol testing</span><span data-ccp-props="{}">&nbsp;</span></li> </ul> <p><strong>COMPENSATION AND BENEFITS:</strong><br><br>Pay Range:<br>Level 1: $105,000.00 - $122,500.00<br>Level 2: $120,000.00 - $150,000.00<br><br></p> <p>Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.</p> <p>Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees accrue paid sick leave pursuant to Company policy which satisfies or exceeds the accrual, carryover, and use requirements of the law.</p> <p>Those with an active clearance will receive a 10% differential, up to an additional $20,000 annually, once officially briefed into a classified program.</p><div class="content-conclusion"><p><strong>ITAR REQUIREMENTS:</strong></p> <ul> <li>To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR <a href="https://www.pmddtc.state.gov/?id=ddtc_kb_article_page&amp;sys_id=24d528fddbfc930044f9ff621f961987">here</a>. &nbsp;</li> </ul> <p>SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.</p> <p>Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to&nbsp;<a href="mailto:EEOCompliance@spacex.com">EEOCompliance@spacex.com</a><em>.&nbsp;</em></p></div>